1. Field of the Invention
The present invention relates generally to a delta-sigma modulator for use with an analog-to-digital converter. More particularly, the present invention relates to the use of a delta-sigma modulator with circuitry to detect instabilities in the modulator and to restore the modulator to a stable operating condition.
2. State of the Art
The general technique of providing analog-to-digital (xe2x80x9cA/Dxe2x80x9d) conversion of signals is well known in the art. Generally, the sampling rate required to sample an analog signal for A/D conversion must be twice the highest frequency component being sampled. This rate is commonly known as the Nyquist rate. More recently, oversampling methods have been used to sample at a rate much higher than the Nyquist rate. An advantage of using oversampling techniques is in the precision provided by the converter. With converters operating under the Nyquist rate for sampling, a higher amount of component precision and matching is required for the conversion than with converters operating under oversampling rates.
One well-known type of oversampling A/D conversion technique uses a modulator commonly referred to as a delta-sigma modulator. In an A/D converter using a delta-sigma modulator including integrator(s), comparator(s) and a digital-to-analog converter (xe2x80x9cDACxe2x80x9d) in the feedback path, a low-pass decimation filter is used following the modulator to provide necessary filtering. The analog input is modulated to a digital bit stream, typically several bits wide.
As shown in the block diagram of FIG. 1, a delta-sigma modulator 2 receives an input 4 and produces an output 6. A delta-sigma modulator 2 may include one or more integration stages 8 and 10. Feedforward paths a1 and a2 are provided from the outputs of each integration stage 8 and 10 to a first summing junction 12 on the non-inverting input to a comparator 14. A feedback path 15 includes a DAC b and extends between the output 6 and a second summing junction 16.
Typically, it is desirable in the design of a delta-sigma modulator to reduce quantization noise. Reduction of quantization noise may be achieved by the selection of a transfer function for the overall modulator that possesses high in-band gain and high out-of-band attenuation, thereby shaping the quantization noise spectrum advantageously. To appropriately shape the overall modulator transfer function, one or more additional integration stages are included within the modulator circuitry, thereby increasing the order of the modulator.
Despite the advantages of higher order modulators, they are well known to be only conditionally stable. All high order modulators become unstable for inputs that exceed certain bounds. Instability may also occur after power-on since operational amplifier (xe2x80x9cop-ampxe2x80x9d) integrators with arbitrary initial states may place the modulator in an unstable region of its state space. In the case of a large input exceeding a stability threshold, even when the input is brought back below the stability threshold, oscillation may still persist. Therefore, a means for detecting instability and restoring the loop back to a stable condition is necessary in higher order modulators.
One approach to correcting the instability found in higher order modulators (three or more integration stages) is to use state-variable clamping techniques. FIG. 2 shows an integration stage 18 of a modulator including an op-amp 20 having an integration capacitor 22 and a limiter 24 coupled between the non-inverting input and the output of the op-amp 20. A non-linear element, such as a limiter, coupled across the integrating capacitor 22 prevents large values from appearing at the integrator output. Typically, for a higher order modulator circuit, the non-linear elements are set to turn xe2x80x9cONxe2x80x9d at about 20-50% higher than the peak-to-peak integrator swings. One example of a limiting scheme implemented in an integrator stage is shown in U.S. Pat. No. 5,977,895 to Murota et al. (Nov. 2, 1999), entitled xe2x80x9cWAVEFORM SHAPING CIRCUIT FOR FUNCTION CIRCUIT AND HIGH ORDER DELTA SIGMA MODULATOR.xe2x80x9d For the approach shown in Murota et al., however, the input signal at each stage must be limited to a few hundred millivolts to maintain stability. As a result, the first stage integrator capacitor tends to be very large relative to the input capacitor. In a high performance A/D modulator design where input capacitors are relatively large, the addition of an even larger first stage integration capacitor results in an area- and power-intensive circuit.
Another approach to overcoming loop stability problems in higher order modulators is to detect an overload condition and degrade the performance of the modulator by changing the modulator integrator coefficients of operation. An example of this approach is disclosed in U.S. Pat. No. 6,064,326 to Krone et al. (May 16, 2000), entitled xe2x80x9cANALOG-TO-DIGITAL CONVERSION OVERLOAD DETECTION AND SUPRESSION.xe2x80x9d Although this approach apparently does not destroy the information stored on the integrators, it does require additional switched capacitors and switch branches to implement.
Yet another approach to solving instability problems in higher order modulators is to sense instability and to responsively reset the circuit to a known state. There are two conventional methods of sensing instability: 1) Looking for integrator input values above a certain value using a comparator; and 2) Looking for long strings of 1s or 0s in the digital bit stream.
U.S. Pat. No. 5,012,244 to Wellard et al. (Apr. 30, 1991), entitled xe2x80x9cDELTA-SIGMA MODULATOR WITH OSCILLATION DETECT AND RESET CIRCUIT,xe2x80x9d includes an example of the first method of sensing instability for higher order modulators. FIG. 3, herein, is similar to that shown in FIG. 1 of the Wellard et al. patent and shows a circuit in which a fourth order delta-sigma modulator 30 uses an oscillation detect comparator 32 to detect instability in the signal at the output of the second integrator 36. If instability is detected, the oscillation detect comparator 32 resets the circuit by short-circuiting the outputs of each of the four integrators 34, 36, 38 and 40 with its respective input by closing a switch 42, 44, 46 and 48 coupled across each of the integrators 34, 36, 38 and 40.
FIG. 4 includes a more detailed diagram of a single integrator stage 50 of the prior art delta-sigma modulator circuit of FIG. 3. Each stage 50 includes an integrating capacitor 52 and a switch 54 coupled in parallel between the output 56 and an input 58 of an op-amp 60. The op-amp 60 shown in FIG. 4 is configured as a single-ended structure, meaning it has only a single output, rather than as a differential-ended structure, meaning it has two outputs. Both singular and differential structures for op-amps are well known in the art.
For the modulator circuit shown in FIG. 3 and the integrator shown in FIG. 4, resetting the integrators 34, 36, 38 and 40 by closing the switches 42, 44, 46 and 48 returns all four integrators 34, 36, 38 and 40 to known, stable states. However, resetting the integrators 34, 36, 38 and 40 in this manner also eliminates any common mode information stored between the inputs and outputs of the integrators 34, 36, 38 and 40 by shorting the integrating capacitors.
Therefore, there is a need for an A/D modulator circuit which overcomes the stability problems experienced by higher order modulator circuits of the prior art, without losing all of the information stored by the modulator integrator stages.
It is an object of the invention to have an A/D modulator circuit which overcomes the stability problems experienced by prior art higher order modulator circuits.
It is another object of the invention to have a high order delta-sigma modulator circuit which is capable of retaining stored common mode information throughout a restore operation.
The present invention provides a higher order (three or more integrator stages) A/D modulator circuit which overcomes an unstable condition through a restore operation while maintaining common mode information stored in each of the integrator stages. As used herein, the term xe2x80x9crestorexe2x80x9d is intended to refer to placing the circuit in a stable condition which may include, but is not limited to, placing the circuit in an original state or placing the circuit in another stable state. A restore operation may include resetting the inputs and outputs of each integrator stage to zero, or may more preferably include re-distributing the charges on the integrating capacitors to place the integrator stage to a stable condition while maintaining the common mode information across the integrator stage. According to an embodiment of the invention, an integrator stage of an A/D modulator circuit comprises a differentially structured operational amplifier having a first restore switch coupled between the inputs of the operational amplifier, and a second restore switch coupled between the outputs of the operational amplifier. A first integrating capacitor is coupled between the inverting input and the non-inverting output of the operational amplifier, and a second integrating capacitor is coupled between the non-inverting input and the inverting output of the operational amplifier.
During operation, the integrating capacitor stores data prior to the operational amplifier becoming unstable. Through an unstable condition detector, the A/D modulator circuit determines that the circuit is unstable and generates a restore signal to each of the switches within the integrator stages of the modulator circuit. The switches across the inputs and outputs of each of the operational amplifiers activate to a closed position in response to the restore signal and remain closed for a predetermined period until the modulator circuit has been restored to a stable condition. Because the switches do not short-out the integrating capacitors, as is conventional in prior art integrator stages, but rather combine the two integrating capacitor branches, the differential voltage respectively between the inputs and between the outputs of the operational amplifier is effectively removed while maintaining the common mode voltage across each of the integrating capacitors.
In another embodiment of the invention, in addition to the switches across the inputs and outputs of the operational amplifiers, an integrator stage comprises a disconnect switch between each of the inputs and outputs of the operational amplifier and, respectively, the first and second restore switches, to isolate the operational amplifier during a restore operation. Upon receiving a restore signal, the restore switches activate to a closed position and the disconnect switches activate to an open position.
An unstable condition detector is also disclosed in conjunction with embodiments of the invention. The unstable condition detector monitors the output of the A/D modulator circuit and generates a restore signal when an unstable condition is detected. In one embodiment, the unstable condition detector is configured as a 4-bit counter for monitoring series of consecutive 1s and 0s and generating a restore signal when the number of consecutive 1s or number of consecutive 0s reaches sixteen.